Question; Hope it's not dumb.

hih_tv-Greg
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Topic 189424

Are programs written differently for Pentium(paralle)computing vs a 486DX cpu? Also if you have a "computer farm" do you have rewrite the program due to increase in paralle channels?

Greg

Saenger
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Question; Hope it's not dumb.

AFAIK programs are the same for every OS, that's why there are optimized clints over @Seti.

And a 'farm' is a (small) network of puters, They can be managed by remote control with the GUI or with BoincView.
Double CPU boards don't count as a farm, they can be managed with the standard Boinc client as well, it will simply run one science app for every (virtual in case of HT) processor, seems to be possible for even muliti-CPU Servers, but I can't tell by experience ;)

Grüße vom Sänger

Walt Gribben
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RE: Are programs written

Quote:
Are programs written differently for Pentium(paralle)computing vs a 486DX cpu? Also if you have a "computer farm" do you have rewrite the program due to increase in paralle channels?

First part - cpu optimization

Program optimization is all done by the compiler, depending on which switches are set. Microsofts Visual Studio C++ compiler uses these:

/GB - Blend Optimizes the code created to favor the Pentium.
/G5 - Pentium.
/G6 - Pentium Pro.
/G7 - Pentium 4 or AMD Athlon.

/GB is the default if none are set.

Besides that, there is the /ARCH switch:

/arch:SSE - use SSE instructions
/arch:SSE2 - use the SSE2 instructions
(using either forces /G7, even if another was specified)

MS VS.NET 2003 says this about /arch:

The optimizer will choose when and how to make use of the SSE and SSE2 instructions when /arch is specified. Currently SSE and SSE2 instructions will be used for some scalar floating-point computations, when it is determined that it is faster to use the SSE/SSE2 instructions and registers rather than the x87 floating-point register stack. As a result your code will actually use a mixture of both x87 and SSE/SSE2 for floating-point computations. Additionally, with /arch:SSE2, SSE2 instructions may be used for some 64-bit integer operations.

hih_tv-Greg
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Hi Grüße vom Sänger, and Walt

Hi Grüße vom Sänger, and Walt Gribben,
Thank you for the reply's. I know that there is more to it, but that will come in time.

Thank you!

Greg

gravywavy
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RE: ... Double CPU boards

Message 13434 in response to message 13431

Quote:
...
Double CPU boards don't count as a farm, they can be managed with the standard Boinc client as well, it will simply run one science app for every (virtual in case of HT) processor...

Careful coding is needed to allow more than one instance of the *same* code to be running in the same memory, whether there is one cpu or more. E@H certainly is written that way (perhaps all BOINC projects?) A single E@H app can be running on both cpus at once, each with a different wu. With a hyperthreaded dual cpu you could have 4 E@H wu all going at once, possibly all running the same app.

The jargon is that the code is 'concurrently reentrant': in other words the intructions in memory can be 'entered' more than once at the same time. As you say, you cater for the possibility of parallel channels. This does not matter when the machines are separate, as each machine has its own, completely distinct, memory.

Supposing you had a non-reentrant project, you'd simply run one of its wu at the same time as one (or more) from some other project, thus getting full value out of the extra cpu(s). The other project might or might not be from BOINC.

~~gravywavy

hih_tv-Greg
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Hey "~~gravywavy", I guess it

Hey "~~gravywavy",
I guess it is the "coding" that I was getting at. Is this part of the program inportant in the way the program behaves(sp?).

Greg

Paul D. Buck
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Yes, and we can even use a

Yes, and we can even use a non-boinc example ...

Most word processors do as you type spell checking. So, the program is written with one complete set of routines that does editing work, and another complete set that does spell checking.

When the word processor starts, it starts one instance of the editor and one instance of the spell checker. Both are initially "blocked" as you are not doing anything ... then you type, both threads un-block and start running... the spell checker is likely to fall behind if you type fast ... but when you pause it catches up ...

Since the threads are independent of each other, they run and stop running as they need ...

With BOINC, we can have a GUI thread (or more), the daemon, the upload/download handler, the science application, etc. all running "at once" even on a single CPU sysem. THe OS just helps us by blocking and releasing the threasds one by one.

On multi-cpu systems like my Xeon I can keep more balls in the air at the same time ...

hih_tv-Greg
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RE: Yes, and we can even

Message 13437 in response to message 13436

Quote:

Yes, and we can even use a non-boinc example ...

Most word processors do as you type spell checking. So, the program is written with one complete set of routines that does editing work, and another complete set that does spell checking.

When the word processor starts, it starts one instance of the editor and one instance of the spell checker. Both are initially "blocked" as you are not doing anything ... then you type, both threads un-block and start running... the spell checker is likely to fall behind if you type fast ... but when you pause it catches up ...

Since the threads are independent of each other, they run and stop running as they need ...

With BOINC, we can have a GUI thread (or more), the daemon, the upload/download handler, the science application, etc. all running "at once" even on a single CPU sysem. THe OS just helps us by blocking and releasing the threasds one by
one.

Hi Mr. Buck,
I didn't know that that much goes on in word processor's. You say that this is common now in most programs?

"Need more input!"(Johnny5)

Thanks Mr. Buck
On multi-cpu systems like my Xeon I can keep more balls in the air at the same time ...


Greg

Paul D. Buck
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RE: Hi Mr. Buck, I didn't

Message 13438 in response to message 13437

Quote:


Hi Mr. Buck,
I didn't know that that much goes on in word processor's. You say that this is common now in most programs?

"Need more input!"(Johnny5)

Oh, yes. And getting more complex as time goes on ...

The whole idea behind distributed computing is "divide and calculate", for most normal programs this is also becoming a comon feature. It allows the programs to run "faster" and to take advantage of multiple processors. Each one working on a small part of the total problem space.

In my "biggest" computer, a Dual Xeon, I have 4 processors and therefor can operate on 4 different things at the same time with no decrease in apparant speed. Because of the difficulties in rasing clock speed (the speed power product) we are now seeing dual cores and Hyper-Threading, or both; as new directions in computers.

But, BOINC also does this. We have a big problem space, we parcel it out to hundreds and thousands of computers who work away at the problem and then return the answers. We are going to likely see most processors at a few select speeds in the future, but with more and more complex chip architectures. One of my favorite examples is an IBM chip in the Power PC family with 4 processor chips, each with dual cores and ability to run multiple threads ... 4 instances of L3 cache each at 32 Megabytes.

A pity that Apple is dropping the Power PC chips from their computers ... one of the reasons I won't buy another Apple till this sorts itself out ...

hih_tv-Greg
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RE: RE: Hi Mr. Buck, I

Message 13439 in response to message 13438

Quote:
Quote:


Hi Mr. Buck,
I didn't know that that much goes on in word processor's. You say that this is common now in most programs?

"Need more input!"(Johnny5)

Oh, yes. And getting more complex as time goes on ...

The whole idea behind distributed computing is "divide and calculate", for most normal programs this is also becoming a comon feature. It allows the programs to run "faster" and to take advantage of multiple processors. Each one working on a small part of the total problem space.

In my "biggest" computer, a Dual Xeon, I have 4 processors and therefor can operate on 4 different things at the same time with no decrease in apparant speed. Because of the difficulties in rasing clock speed (the speed power product) we are now seeing dual cores and Hyper-Threading, or both; as new directions in computers.

But, BOINC also does this. We have a big problem space, we parcel it out to hundreds and thousands of computers who work away at the problem and then return the answers. We are going to likely see most processors at a few select speeds in the future, but with more and more complex chip architectures. One of my favorite examples is an IBM chip in the Power PC family with 4 processor chips, each with dual cores and ability to run multiple threads ... 4 instances of L3 cache each at 32 Megabytes.

A pity that Apple is dropping the Power PC chips from their computers ... one of the reasons I won't buy another Apple till this sorts itself out ...

Hi Mr. Buck,
What is a "core", I have a P4 rated at 3Gig/Hz... is this one core?
Thank you

Greg

gravywavy
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RE: What is a "core", I

Message 13440 in response to message 13439

Quote:

What is a "core", I have a P4 rated at 3Gig/Hz... is this one core?
Thank you

hi again Greg,

The short answer is a marketing one: at the moment dual-core is the buzz, so if your chip was dual core you'd have been told, if they kept quiet on the issue its a single core. ther current buzzwords are 64bit and hyperthreading - for the moment if you have any of these the vendor who took your money will have made sure you knew you were getting them!

From about 1980 to 2004 the mass market only knew the idea that one cpu was one chip, and we never considered the issue. Before ~1980 a cpu would be spread over more than one chip, recently we've been getting chips with more thanone cpu inside and need to re-invent our langauge. Three new things to hit the mass market are:

1. Two pieces of silicon in one package, cpus that are electrically separate but that talk to the motherboard through the same square array of pins and are cooled by the same heatsink.

2. One piece of silicon which contains two logically separate cpus. These may still be almost completely separate inside the chip (the intel approach) or may also have a means of communicating between them.

3. A single cpu (ie just one set of crunching hardware) with a very fast way built into the chip that allows it to go onto other work but remember where it got up to on the first piece of work. From the programmer's point of view this is like having separate cpus, even tho physically there is only one in there. intel call this "hyperthreading", and some AMD chips do it as well but call it something else (someone remind me?)

All of these look like one cpu to the sytem builder and look like more than one cpu to the operating system. In cases 1 and 2 we'd say there are two cores, in case 3 we'd say there is just one.

Any mass market chip sold before this year will be single core, like our P-III machines (one thing we have in common is our shared show respect for aging hardware).

The latest intel chips combine these ideas: they have dual hyperthreaded cores, so you have just one motherboard socket but the chip shows up as four cpu's in BOINC.

For those who pay for Windows licences this is a big saving: a server containing four sockets each with a chip in is licensed as a multi-cpu machine by Microsoft; a board with one socket but effectively having the same flexibility as the previous machine runs on the standard Windows licence, the MS lawyers who drew up the licence did so before the issue arose. This is not an issue, of course, for Linux users who are very happy to pay four times zero for their multi-core licence!

~~gravywavy

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