Sun UltraSPARC T1 vs. Rest of CPUs?

Jahosad
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Topic 193131

I was just wondering: Has anyone tried to run BOINC on a system with this processor in it? I'm assuming not, but I'd thought I'd ask anyways!

I'm really interested in seeing if a processor built like this (8 cores for a total of 32 active threads!) would be able to run 32 WUs at the same time? If I'm not wayyy off the road, I think that it could. At 1.1GHz it's not going to blow you out of the water, but that's still 32 WUs all being worked on at the same time.

I'd also like to see if the throughput of a system like this would compare to say a Dual or Quad core!

What are your thoughts?

Michael Karlinsky
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Sun UltraSPARC T1 vs. Rest of CPUs?

Quote:

What are your thoughts?

Performance at E@H would be really bad, I supppose, because there is only one FPU. T1 was developed to deliver high integer performance and to run multiple threads in parallel. Usually needed by web-servers.

T2 will have one FPU per core!

See WIKI.

Michael

Jahosad
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RE: RE: T2 will have one

Message 73041 in response to message 73040

Quote:
Quote:


T2 will have one FPU per core!

So it's all about the FPUs, not the threads. Makes sense! Thanks for the link and info, now I'm getting excited!

Bikeman (Heinz-Bernd Eggenstein)
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RE: T2 will have one FPU

Message 73042 in response to message 73040

Quote:


T2 will have one FPU per core!

See WIKI.

Michael

Still worse, I think it has one FPU per CPU (!) ... so up to 8 cores or 32 threads competing for a single FPU.
CU
Bikeman

Akos Fekete
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RE: RE: T2 will have one

Message 73043 in response to message 73042

Quote:
Quote:
T2 will have one FPU per core!

Still worse, I think it has one FPU per CPU (!) ... so up to 8 cores or 32 threads competing for a single FPU.


T2 has 8 different FPUs.
See the datasheet: UltraSPARC T2 Datasheet (2nd page)

Bikeman (Heinz-Bernd Eggenstein)
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Ah, sorry for the confusion

Ah, sorry for the confusion by cut and paste= :

T1 (the one mentioned in the title and the linked WIKI entry): 1 FPU per CPU

T2 : 1 CPU per core

BRM

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