akosf S39L Performance Observations thread

archae86
archae86
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Topic 190952

See:
S39L announcement

As akosf has posted the availability of a yet newer executable here is a place to post and discuss results with it.

I understand that the design is targetted to provide better performance for chips with smaller L1 cache (such as Coppermine Pentium III's with 16k L1 data cache).

I'm not clear on whether it is expected that S39L will give better or worse performance than S39 on larger cache more modern chips, but intend to convert my set of machines tonight to contribute some data on this point.

archae86
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akosf S39L Performance Observations thread

Quote:

I understand that the design is targetted to provide better performance for chips with smaller L1 cache (such as Coppermine Pentium III's with 16k L1 data cache).

I'm not clear on whether it is expected that S39L will give better or worse performance than S39 on larger cache more modern chips, but intend to convert my set of machines tonight to contribute some data on this point.

After I wrote that, I ran both cpu-z and wcpuid on my fastest machine, a P4 EE HT. cpu-z identifies it as a Gallatin--this being a direct Northwood descendant with an on-chip 2M cache.

Rather to my surprise, both cpu-z and wcpuid say this flavor of P4 has a _smaller_ L1 data cache than coppermine--only 8 kbyte.

Perhaps this may mean that S-39L's attempted reduced working set will help Northwood-flavor P4's, if successful. My trial is underway.

Akos Fekete
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RE: After I wrote that, I

Message 26454 in response to message 26453

Quote:

After I wrote that, I ran both cpu-z and wcpuid on my fastest machine, a P4 EE HT. cpu-z identifies it as a Gallatin--this being a direct Northwood descendant with an on-chip 2M cache.

Rather to my surprise, both cpu-z and wcpuid say this flavor of P4 has a _smaller_ L1 data cache than coppermine--only 8 kbyte.

Perhaps this may mean that S-39L's attempted reduced working set will help Northwood-flavor P4's, if successful. My trial is underway.

I think the difference between L1 and L2 cache isn't so important on Intel processors than AMD, because of their inclusive cahce technique.

archae86
archae86
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RE: RE: After I wrote

Message 26455 in response to message 26454

Quote:
Quote:

After I wrote that, I ran both cpu-z and wcpuid on my fastest machine, a P4 EE HT. cpu-z identifies it as a Gallatin--this being a direct Northwood descendant with an on-chip 2M cache.

Rather to my surprise, both cpu-z and wcpuid say this flavor of P4 has a _smaller_ L1 data cache than coppermine--only 8 kbyte.

Perhaps this may mean that S-39L's attempted reduced working set will help Northwood-flavor P4's, if successful. My trial is underway.

I think the difference between L1 and L2 cache isn't so important on Intel processors than AMD, because of their inclusive cahce technique.

As Willamette-descendent P4's started with 8k L1 cache and continued so through several design generations, this answer is important as it represents a big share of current volunteer computer capacity.

My measurements are inconclusive--the variation in CPU time from result to result from differences in the Work Unit and differences in the PC conditions is large enough to cast some doubt on attributions to S-39 vs. S-39L.

My Gallatin machine seems to be taking .92 as long as before.
While my previously problematic PIII seems to take .85 (big improvement), my previously happier PIII seems very slightly slower at 1.004.

I'd summarize initial results on my own machines and those reported on the other thread as showing S-39L as an overall modest but real improvement, but no reason to restrict use of it to PIII's.

It was not my intention to start two competing S-39L threads, he posted as I was typing and I don't have a means to cancel a thread--I'll make any further observations on the ziegenmelker S-39L thread

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