Recent posts

Hi! Just for the sake of completeness, here's a reference to the paper mentioned earlier ("4-step" and "6-step" FFT...
22nd January 2014
Hi! @BackGroundMAN : Thanks for expanding in so great detail on FPGA implementation. Very interesting indeed to get a...
20th January 2014
Quote:Hi, I am working with VHDL/Verilog for a long time (MSc, PhD) and for the last 2 years hardware development is...
18th January 2014
Hi! For the host in the thread starting message I see validate errors and invalid results for both GPU and CPU apps,...
16th January 2014
Congratulations Mike! Good to see the thing actually exists ;-) . I have a backer number in the 5000s so I'll have to...
15th January 2014